A flash memory based solid-state drive (SSD) may have various merits including low power consumption, high speed, and low weight and thus, may be used as a storage device in a wide range of applications from laptop computers and personal computers to servers and cloud systems.
However, the existing SSD may be less safe, which may result in frequent occurrences of errors in a main component of the SSD, that is, a flash memory. The lower degree of safety may result from limited wear leveling.
Recently, multi level cell (MLC) or a triple level cell (TLC) flash memory capable of storing more than two bits in a cell has been widely adopted and thus, greater consideration is being given to the safety issue. In general, the SSD may write error detection and error correcting codes in an out of band (OOB) area of the flash memory and respond to an unexpected error using the written errors and error correcting codes. However, the SSD may detect and correct only several bit errors occurring during input and output of a single page based on the error detection and correction codes and accordingly, may not be able to detect or respond to errors occurring at the block or chip level.
A related technology may internally apply a redundant array of independent disks (RAID) method to the SSD to improve reliability. However, the RAID method incurs the small write problem issue, which may lower performance and reduce the service lifetime of the flash memory.
Accordingly, there is a desire to design a reliable SSD device in which the small write problem issue is resolved even when using the RAID method.